29PL256N datasheet(69/74 Pages) SPANSION

69 / 74 page

June 6, 2007 S29PL-N_00_A5

S29PL-N MirrorBit

™ Flash Family

Da ta

Shee t

(Prelim i nar y )

Notes

1. See Table 7.1 on page 20 for description of bus operations.

2. All values are in hexadecimal.

3. Except for the following, all bus cycles are write cycle: read cycle, fourth through sixth cycles of the Autoselect commands, and password verify commands, and

any cycle reading at RD(0) and RD(1).

4. Data bits DQ15 – DQ8 are don’t care in command sequences, except for RD, PD, WD, PWD, and PWD3 – PWD0.

5. Unless otherwise noted, these address bits are don’t cares: PL127: A22 – A15; 129N: A21 – A15; PL256N: A23 – A14.

6. Writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. The system must write the reset

command to return the device to reading array data.

7. No unlock or command cycles required when bank is reading array data.

8. The Reset command is required to return to reading array data (or to the erase-suspend-read mode if previously in Erase Suspend) when a bank is in the

autoselect mode, or if DQ5 goes high (while the bank is providing status information) or performing sector lock/unlock.

9. The fourth cycle of the autoselect command sequence is a read cycle. The system must provide the bank address. See Autoselect on page 23.

10. The data is 0000h for an unlocked sector and 0001h for a locked sector.

11. Device IDs: PL256N = 223Ch; PL127N = 2220h;

PL129N = 2221h.

12. See Autoselect on page 23.

13. The Unlock Bypass command sequence is required prior to this command sequence.

14. The Unlock Bypass Reset command is required to return to reading array data when the bank is in the unlock bypass mode.The system may read and program

in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase Suspend command is valid only during a sector erase

operation, and requires the bank address.

15. The Erase Resume command is valid only during the Erase Suspend mode, and requires the bank address.

16. Command is valid when device is ready to read array data or when device is in autoselect mode.The total number of cycles in the command sequence is

determined by the number of words written to the write buffer. The maximum number of cycles in the command sequence is 37.

17. The entire four bus-cycle sequence must be entered for which portion of the password.

18. The Unlock Bypass Reset command is required to return to reading array data when the bank is in the unlock bypass mode.The system may read and program

in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase Suspend command is valid only during a sector erase

operation, and requires the bank address.

19. The Erase Resume command is valid only during the Erase Suspend mode, and requires the bank address.

20. Command is valid when device is ready to read array data or when device is in autoselect mode.The total number of cycles in the command sequence is

determined by the number of words written to the write buffer. The maximum number of cycles in the command sequence is 37.

21. The entire four bus-cycle sequence must be entered for which portion of the password.

22. The ALL PPB ERASE command pre-programs all PPBs before erasure to prevent over-erasure of PPBs.

23. WP#/ACC must be at VHH during the entire operation of this command.

24. Command sequence resets device for next command after write-to-buffer operation.

25. Entry commands are needed to enter a specific mode to enable instructions only available within that mode.

26. If both the Persistent Protection Mode Locking Bit and the password Protection Mode Locking Bit are set a the same time, the command operation aborts and

returns the device to the default Persistent Sector Protection Mode.

27. The Exit command must be issued to reset the device into read mode. Otherwise the device hangs.

29PL256N Datasheet(PDF) 69 Page - SPANSION

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