TMPR4956C datasheet(55/286 Pages) TOSHIBA

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Chapter 2 Features

2-7

Table 2.2.4 System Interface (when R4300 type protocol mode (MODE43* = 0, BSIZE64*=1))

Signal Name

Pin No.

I/O

Function

SysAD[63:32]

B5, B6, B7,

B8, B9, B10,

B11, B12,

B13, B14,

E14, F14,

G14, H14,

J14, K14,

L14, M14,

N14, P14,

P13, P4, P3,

N2, M2, L2,

K2, J2, E2,

D2, C2, B2

I/O

These pins are driven to 0 at both address output and data input cycles, and then

these pins can be left open on the board.

SysAD[31:0]

A10, A11,

A12, A13,

C15, D15,

E15, F15,

G15, H15,

J15, K15,

L15, M15,

N15, P15,

L1, K1, J1,

H2, H1, G2,

G1, F2, F1,

E1, D1, C1,

A6, A7, A8,

I/O

System address/data bus

A 32-bit address and data bus for communication between the processor and an

external agent.

SysCmd[8:5]

R9, P9, R8,

I/O

These pins are driven to 0 at both address output and data input cycles, and then can

be left open on the board.

SysCmd[4:0]

R7, P7, R6,

P6, R5

I/O

System command/data identifier bus

A 5-bit bus for command and data identifier transmission between the processor and

an external agent.

SysADC[7:0]

N5, N4, N6,

N9, C14,

D14, C9,

C13

I/O

These pins are driven to 0 at both address output and data input cycles, and then can

be left open on the board.

SysCmdP

I/O

This pin is driven to 0 at both address output and data input cycles, and then can be

left open on the board

Evalid*

External agent valid input

This signal should be asserted when an external agent is driving a valid address or

valid data on the SysAD bus, and a valid command or data identifier on the SysCmd

bus.

Pvalid*

Processor valid output

The processor asserts this signal when the processor is driving a valid address or valid

data on the SysAD bus, and a valid command or data identifier on the SysCmd bus.

EReq*

R12

External request

This signal should be asserted when an external agent is requesting System interface

bus ownership.

PMaster*

Processor Master

The processor asserts this signal when the processor is a bus master.

EOK*

External agent Ready

This signal should be asserted when an external agent accepts a processor request.

RdRdy*

This signal has a pull-down resistor in the internal of the processor, and then this

signal can be left open on the board.

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