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TMP88CS38 Datasheet(PDF) 127 Page - Toshiba Semiconductor

Part # TMP88CS38
Description  8-bit single chip microcomputer
PDF  226 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP88CS38 Datasheet(HTML) 127 Page - Toshiba Semiconductor

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TMP88CS38/CM38A/CP38A
2007-09-12
88CS38-127
2.12 Key-on Wakeup
In this MCU the IDLE mode is also released by low active port inputs. The low input voltage
is regulated higher than the other normal ports. Therefore the ports can be enabled by analog
input level.
2.12.1
Configuration
Figure 2.12.1 Key-on Wakeup Control Circuit
2.12.2
Control
P53 to P56 and P60, P61 ports can be controlled by IDLE control register (IDLECR).
It can be configured as enable/disable in one-bit unit. When those pins are used by IDLE
mode release, those pins must be set input mode (P5CR1, P5, P6CR, P6, ADCCRA).
IDLE mode is controlled by system control register 2 (SYSCR2) and maskable interrupts.
After the individual enable flag (EF5) is set to “1”, the IDLE mode must starts. When
enabled port input generates INTKWU interrupt, the IDLE mode is released. Low level
input voltage in those ports is regulated to less than VDD
× 0.65 (V).
IDLE port monitorring register (IDLEIN) can be used to check state of ports.
INTADEN can enable to generate AD8TRG, which is used as trigger of AD converter
trigger start mode.
Noise reject circuit eliminate noise, which is less than 24
μs period.
AD Converter
VIL
≤ VDD × 0.65
PORT P53
Port P54
Port P55
Port P56
Port P60
Port P61
AIN1
AIN2
AIN3
AIN4
AIN5
Noise
reject
circuit
INTKWU
IDLE0
IN
IDLE1
IN
IDLE2
IN
IDLE3
IN
*
*
IDLE4
IN
IDLE5
IN
IDLE0
IN
IDLE1
IN
IDLE2
IN
IDLE3
IN
INTAD
EN
*
IDLE4
IN
IDLE5
IN
AD8TRG
AIN0
1
KWU
2
KWU
3
KWU
4
KWU
5
KWU
0
KWU
IDLECR (00FD0H)
IDLEIN (00FD0H)



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