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TMP88CS38 Datasheet(PDF) 155 Page - Toshiba Semiconductor |
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TMP88CS38 Datasheet(HTML) 155 Page - Toshiba Semiconductor |
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155 / 226 page ![]() TMP88CS38/CM38A/CP38A 2007-09-12 88CS38-155 Note 1: THD: One cycle of HD signal. Note 2: The data written to these control registers is transmitted to OSD circuit by setting RGWR (Bit2 in ORDON) to “1”. Note 3: If display lines are overlapped each other, previous display line is enabled and next line is disabled. If vertical display start positions of two or more lines are set on same value, high priority line is enabled. Lines of OSD (VS1 to VS12) are fixed priority levels as follows: VS1 > VS2 > VS3 > ...... > VS12 Set the vertical display start position not to overlap display lines. Note 4: The line which is displayed off is managed as a small size character line. Note 5: Transfer the contents of vertical display start position registers into OSD circuit before the position of the scanning line coincides with their own vertical display start position. (2) Area display position setting The planes have the priority such as Code plane > Area plane 1 > Area plane 2 > Raster plane. 1. Horizontal display start and end position The horizontal display start position can be set in 512 steps by writing to OSD control registers AHSn8 to AHSn0 (Bit8 to 0 in ORAHSn). And also display stop position is correspond to AHEn8 to AHEn0 (Bit8 to 0 in ORAHEn). (n: 1 to 2) Horizontal display start position AHSn = (AHSn8 to AHSn0)H × 2TOSC Horizontal display end position AHEn = (AHEn8 to AHEn0)H × 2TOSC Note 1: TOSC: One cycle of OSD oscillation. Note 2: If the horizontal display start position for characters is the same as that for areas, the two positions are not displayed at the same time. The horizontal display start position for characters is displayed 16 TOSC (Corresponding to a register value of 8) later than that for areas. VS5 (Display on, small character) VS2 (Display canceled, middle character) VS3 (Display on, small character) Occasion of overlapping |
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