TPS65921 datasheet(46/70 Pages) TI2

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Sequence_Start

REGEN

VIO

VPLL1

VDD2

VDD1

32K

OUT

CLK

SYSEN

CLKEN

HFCLKOUT

NRESPWRON

4608 ms battery detection

1068 ms - 3 MHz oscillator setting + clock switch

1099 ms for VDD2 stabilization and VDD1 start ramping

1179 ms for VIO stabilization

1022 ms for LDO stabilization and start DC-DC ramping

61 ms

29.053 ms

1175 ms for VDD1 stabilization

1179 ms for VIO stabilization

1.8 V

1.2 V

SWCS048-019

32.410 ms

TPS65921

SWCS048G – MARCH 2010 – REVISED SEPTEMBER 2014

www.ti.com

5.5.5.1

Switch On In MASTER_C021_GENERIC Mode

Figure 5-8 describes the timing and control that must occur in Master_C021_Generic mode.

Sequence_Start is a symbolic internal signal to ease the description of the power sequences and occurs

according to the different events detailed in Figure 5-7.

Figure 5-8. Timings—Switch On in Master_C021_Generic Mode

PARAMETER

MIN

MAX

UNIT

32k clock cycles

Detailed Description

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