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STA333BW Datasheet(PDF) 25 Page - STMicroelectronics |
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STA333BW Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 64 page ![]() STA333BW Register description 25/64 6.2 Configuration register B (0x01) 6.2.1 Serial audio input interface format 6.2.2 Serial data interface The STA333BW audio serial input was designed to interface with standard digital audio components and to accept a number of serial data formats. STA333BW always acts a slave when receiving audio input from standard digital audio components. Serial data for two channels is provided using three inputs: left/right clock LRCKI, serial clock BICKI, and serial data 1 and 2 SDI12. The SAI register (configuration register B (0x01), bits D3 to D0) and the SAIFB register (configuration register B (0x01), bit D4) are used to specify the serial data format. The default serial data format is I2S, MSB-first. Available formats are shown in the tables and figure that follow. 6.2.3 Serial data first bit D7 D6 D5 D4 D3 D2 D1 D0 C2IM C1IM DSCKE SAIFB SAI3 SAI2 SAI1 SAI0 1 000 00 00 Bit R/W RST Name Description 0 R/W 0 SAI0 Determines the interface format of the input serial digital audio interface. 1 R/W 0 SAI1 2 R/W 0 SAI2 3 R/W 0 SAI3 SAIFB Format 0MSB-first 1 LSB-first Table 11. Support serial audio input formats for MSB-first (SAIFB = 0) BICKI SAI [3:0] SAIFB Interface format 32fs 0000 0 I2S 15-bit data 0001 0 Left/right-justified 16-bit data |
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