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STA333BW Datasheet(PDF) 36 Page - STMicroelectronics |
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STA333BW Datasheet(HTML) 36 Page - STMicroelectronics |
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36 / 64 page ![]() Register description STA333BW 36/64 Figure 15. 2.0 channels (OCFG=’00’) PWM slots. 2.1 channels, two half bridges + one full bridge (OCFG="01"): " DDX1A ' OUT1A " DDX2A ' OUT1B " DDX3A ' OUT2A " DDX3B ' OUT2B " DDX1A ' OUT3A " DDX1B ' OUT3B " DDX2A ' OUT4A " DDX2B ' OUT4B " DDX1A/1B configured as binary " DDX2A/2B configured as binary " DDX3A/3B configured as binary " DDX4A/4B is not used In this configuration, channel 3 has full control (volume, EQ, etc…). On OUT3/OUT4 channels the channel 1 and channel 2 PWM are replicated. In this configuration the PWM slot phase is the following as shown in the next figures: OUT1A OUT1B OUT2A OUT2B OUT3A OUT3B OUT4A OUT4B |
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