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C8051F310 Datasheet(PDF) 208 Page - Silicon Laboratories |
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C8051F310 Datasheet(HTML) 208 Page - Silicon Laboratories |
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208 / 228 page ![]() C8051F310/1/2/3/4/5/6/7 208 Rev. 1.7 18.2.3. High-Speed Output Mode In High Speed Output mode, a module’s associated CEXn pin is toggled each time a match occurs between the PCA Counter and the module's 16-bit capture/compare register (PCA0CPHn and PCA0CPLn) Setting the TOGn, MATn, and ECOMn bits in the PCA0CPMn register enables the High- Speed Output mode. Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/ Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’. Figure 18.6. PCA High Speed Output Mode Diagram Match 16-bit Comparator PCA0H PCA0CPHn Enable PCA0L PCA Timebase PCA0CPLn 0 1 00 0 x ENB ENB 0 1 Write to PCA0CPLn Write to PCA0CPHn Reset PCA0CPMn P W M 1 6 n E C O M n E C C F n T O G n P W M n C A P P n C A P N n M A T n x CEXn Crossbar Port I/O Toggle 0 1 TOGn PCA0CN C F C R C C F 0 C C F 2 C C F 1 C C F 4 C C F 3 PCA Interrupt |
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