C8051F310 datasheet(209/228 Pages) SILABS

209 / 228 page

Rev. 1.7

209

C8051F310/1/2/3/4/5/6/7

18.2.4. Frequency Output Mode

Frequency Output Mode produces a programmable-frequency square wave on the module’s associated

CEXn pin. The capture/compare module high byte holds the number of PCA clocks to count before the out-

put is toggled. The frequency of the square wave is then defined by Equation 18.1, where FPCA is the fre-

quency of the clock selected by the CPS2-0 bits in the PCA mode register, PCA0MD.

Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.

The lower byte of the capture/compare module is compared to the PCA counter low byte; on a match,

CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn. Fre-

quency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn register.

Figure 18.7. PCA Frequency Output Mode

Equation 18.1. Square Wave Frequency Output

CEXn

PCA

PCA0CPHn

-----------------------------------------

8-bit

Comparator

PCA0L

Enable

PCA Timebase

match

PCA0CPHn

8-bit Adder

PCA0CPLn

Adder

Enable

CEXn

Crossbar

Port I/O

Toggle

TOGn

000

PCA0CPMn

ENB

Write to

PCA0CPLn

Write to

PCA0CPHn

Reset

C8051F310 Datasheet(PDF) 209 Page - Silicon Laboratories

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