SCM3000C datasheet(18/41 Pages) SANKEN

18 / 41 page

SCM3000C Series

SCM3000C-DSE Rev.1.2

SANKEN ELECTRIC CO., LTD.

Aug. 21, 2017

http://www.sanken-ele.co.jp/en

12.2.5. LS1, LS2, and LS3

These are the emitter pins of the low-side IGBTs. For

current detection, the LS1, LS2, and LS3 pins should be

connected externally on a PCB via shunt resistors, RSx,

to the COM pin.

When connecting a shunt resistor, place it as near as

possible to the IC with a minimum length of traces to the

LSx and COM pins. Otherwise, malfunction may occur

because a longer circuit trace increases its inductance

and thus increases

its

susceptibility to improper

operations. In applications where long PCB traces are

required, add a fast recovery diode, DRSx, between the

LSx and COM pins in order to prevent the IC from

malfunctioning.

VBB

LS3

LS2

LS1

COM

VDC

RS1

RS2

RS3

CDC

Put a shunt resistor near

the IC with a minimum

length to the LSx pin.

Add a fast recovery

diode to a long trace.

DRS1

DRS2

DRS3

Figure 12-3.

Connections to LSx Pin

12.2.6. VB1, VB2, and VB3

These are the inputs of the high-side floating power

supplies for the individual phases. A bootstrap capacitor,

CBOOTx, should be connected in each trace between the

VBx and the output (U, V, or W) pins.

Voltages across the VBx and output (U, V, or W) pins

should be maintained within the recommended range

(i.e., the Logic Supply Voltage, VBS) given in Section 2.

As shown in Figure 12-4, in each trace between VBx

and VCC pins, a bootstrap diode, DBOOTx, and a current-

limiting resistor, RBOOTx, are placed in series.

For proper startup, turn on the low-side transistor first,

then charge the bootstrap capacitor, CBOOTx, up to its

maximum capacity. Table 12-1 shows a relation between

the charging time and capacitance of CBOOTx at startup.

For capacitance of the bootstrap capacitors, CBOOTx,

choose the values that satisfy Equations (1) and (2).

Note

that

capacitance

tolerance

and

bias

characteristics must be taken into account when you

choose appropriate values for CBOOTx.

CBOOTx(µF)>800×tL(OFF)(s)

(1)

10µF≤CBOOTx≤220µF

(2)

In Equation (1), let tL(OFF) be the maximum off-time of

the low-side transistor (i.e., the non-charging time of

CBOOTx), measured in seconds.

Table 12-1.

CBOOTx Capacitance vs. Charging Time

at Startup

CBOOTx Capacitance

(µF)

Reference Charging Time

(s)

0.5

100

1.0

220

1.0

VCC

COM

VBB

LS3

LS2

VB1

CBOOT3

VDC

LS1

VCC

VB3

VB2

CBOOT1

CBOOT2

MIC

RBOOT1

DBOOT1

DBOOT2

DBOOT3

RBOOT2

RBOOT3

Figure 12-4.

Bootstrap Circuit

Even during the high-side transistor is not on, voltage

across the bootstrap capacitor keeps decreasing due to

power dissipation in the IC. When the VBx pin voltage

decreases to VBS(OFF) or less, the high-side undervoltage

lockout (UVLO_VB) starts operating (see Section

12.3.2.1). Therefore, actual board checking should be

done thoroughly to validate that voltage across the VBx

pin maintains over 11 V (VBS > VBS(OFF)) during a low-

frequency operation such as a startup period.

Figure 12-5 shows an internal level-shifting circuit

that produces high-side output signals, HOx. A high-side

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