LTC6801 datasheet(9/28 Pages) AD

9 / 28 page

LTC6801

Rev. F

For more information www.analog.com

PIN FUNCTIONS

HYST (Pin 32): Hysteresis Three-Level Input. This pin

may be tied to VREG, VREF or V–. HYST selects the amount

of hysteresis applied to the undervoltage and overvoltage

threshold settings and has an internal pull-down to V–.

See Table 4.

UV0, UV1 (Pin 33, Pin 34): Undervoltage Three-Level

Inputs. These pins may be tied to VREG, VREF or V–. UV1

and UV0 select the undervoltage threshold and each pin

has an internal pull-up to VREG. See Table 2.

OV0, OV1 (Pin 35, Pin 36): Overvoltage Three-Level

Inputs. These pins may be tied to VREG, VREF or V–. OV1

and OV0 select the overvoltage threshold and each pin

has an internal pull-down to V–. See Table 1.

Table 1. Overvoltage Inputs

OV1

OV0

OVERVOLTAGE THRESHOLD (V)

VREG

4.498

VREG

VREF

4.403

VREG

V–

4.307

VREF

VREG

4.211

VREF

4.116

VREF

V–

4.020

V–

VREG

3.924

V–

VREF

3.828

V–

3.733

Table 2. Undervoltage Inputs

UV1

UV0

UNDERVOLTAGE THRESHOLD (V)

VREG

2.871

VREG

VREF

2.680

VREG

V–

2.489

VREF

VREG

2.297

VREF

2.106

VREF

V–

1.914

V–

VREG

1.723

V–

VREF

1.531

V–

0.766

Table 3. Duty Cycle Select

NOMINAL CYCLE TIME*

VREG

15.5ms

VREF

Approximately 130ms

V–

Approximately 500ms

*Cycle time based on LTC6801 measuring 12 cells and 2 temperatures.

Table 4. Hysteresis Select

HYST

UV HYSTERESIS*

OV HYSTERESIS

VREG

500mV

200mV

VREF

250mV

100mV

V–

0mV

*UV hysteresis is disabled when the undervoltage threshold is set to 0.766V.

Table 5. Cell Count Select

CC1

CC0

CELL COUNT

VREG

VREF

VREG

V–

VREF

VREG

VREF

V–

VREG

V–

VREF

V–

LTC6801 Datasheet(PDF) 9 Page - Analog Devices

LTC6801 Datasheet(HTML) 9 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL