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LS1012A Datasheet(PDF) 26 Page - NXP Semiconductors |
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LS1012A Datasheet(HTML) 26 Page - NXP Semiconductors |
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26 / 39 page ![]() 2.11.1 I2C devices and addresses The LS1012A I2C1 interface operates at 1.8 V OVDD power supply. Table 2-9 summarizes the I2C bus device addresses. NOTE 7 bit addresses do not include the R/W bit as an address member, though some data sheets might do so. For consistency, all I2C addresses are 7 bits of addresses only. Table 2-9. I2C bus device map I2C bus I2C address Device Notes I2C1 0x0a SAI audio codec • SAI 2 port with full duplex support n/a mikroBUS host connector • Supports Plug and play Click boards™ to expand the design as required, with minimum hardware configuration 0X08 MC34VR5100A1EP • Power supply for: • LS1012A power supplies • DDR3L memory • 1.8 V voltage for QSPI memory, SAI2 port, general I/O n/a M.2 Type E NGFF Slot (J35) • Supports PCIe Gen1/2 M.2 Type E, 2230/1630 size add-in cards 2.12 QSPI interface The FRWY-LS1012A supports QSPI as the primary system boot source. The FRWY- LS1012A supports onboard Winbond W25M161AWEIT single/dual/quad-SPI serial flash memory with 16 Mbit NOR and 1 Gbit NAND space in a single die chip. LS1012A supports only one QSPI controller with 1 chip select, PROC_QSPI_CS_B. The board supports quad, single, and dual bit modes. 2.13 SPI interface The FRWY-LS1012A SPI features are as follows: QSPI interface Layerscape LS1012A Freeway (FRWY-LS1012A) Board Reference Manual, Rev. 0, 04/2018 26 NXP Semiconductors |
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