XC2000 datasheet(76/110 Pages) INFINEON

76 / 110 page

XC2287 / XC2286 / XC2285

XC2000 Family Derivatives

Electrical Parameters

Preliminary

Data Sheet

V0.91, 2007-02

Draft Version

Absolute sum of overload

currents

Σ|IOV|

–

External Pin Load

Capacitance

–

Pin drivers in

default mode

Voltage Regulator Buffer

Capacitance

EVR

–

680

–

For each core

domain

Ambient temperature

–

––°C

See Table 1

1) In case both core power domains are clocked, the difference between the power supply voltages must be less

than 10mV. This condition imposes additional constraints when using external power supplies. In order to

supply both core power domains, two independent external voltage regulators may not be used. The simplest

possibility is to supply both power domains directly via a single external power supply.

2) Performance of pad drivers, A/D Converter, and Flash module depends on

DDP.

3) This limitation must be fulfilled under all operating conditions including power-ramp-up, power-ramp-down,

and power-save modes, if

DDI is supplied externally.

4) Overload conditions occur if the standard operating conditions are exceeded, i.e. the voltage on any pin

exceeds the specified range:

OV > VIHmax (IOV >0) or VOV < VILmin (IOV < 0). The absolute sum of input

overload currents on all pins may not exceed 50 mA. The supply voltages must remain within the specified

limits. Proper operation under overload conditions depends on the application.

Overload conditions must not occur on pin XTAL1 (powered by

DDI).

5) Not subject to production test - verified by design/characterization.

6) An overload current (

OV) through a pin injects a certain error current (IINJ) into the adjacent pins. This error

current adds to the respective pin’s leakage current (

OZ). The amount of error current depends on the overload

current and is defined by the overload coupling factor

OV. The polarity of the injected error current is inverse

compared to the polarity of the overload current that produces it.

The total current through a pin is |

TOT| = |IOZ| + (|IOV| × KOV). The additional error current may distort the input

voltage on analog inputs.

7) The timing is valid for pin drivers operating in default current mode (selected after reset). Reducing the output

current may lead to increased delays or reduced driving capability (

L).

8) To ensure the stability of the voltage regulators each core voltage domain must be buffered with a ceramic

capacitor. For domain M a 680 nF capacitor is recommended, for domain 1 three 220 nF capacitors are

recommended. All buffer capacitors must be connected als close to the

DDI pins as possible to keep the

resistance of the board tracks below 2

Ω.

Table 10

Operating Condition Parameters (cont’d)

Parameter

Symbol

Values

Unit Note /

Test Condition

Min.

Typ.

Max.

XC2000 Datasheet(PDF) 76 Page - Infineon Technologies AG

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