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7477 Datasheet(PDF) 37 Page - Renesas Technology Corp |
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7477 Datasheet(HTML) 37 Page - Renesas Technology Corp |
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37 / 48 page ![]() 36 MITSUBISHI MICROCOMPUTERS 7477/ 7478 GROUP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER Power source Analog power source Reset input Reset input Clock input Clock output Reference voltage input Select mode I/O port P0 Data I/O D0–D7 I/O port P1 Address input A4–A10 Input port P2 Address input A0–A3 Input port P3 Address input A11, A12 Select mode VPP input I/O port P4 Address input A13, A14 Input port P5 VCC,VSS AVSS (Note 1) RESET XIN XOUT VREF P00 – P07 P10 – P17 P20 – P27 (Note 2) P30 – P33 P40 – P43 (Note 3) P50 – P53 (Note 4) Single-chip /EPROM Single-chip /EPROM Single-chip EPROM Single-chip /EPROM Single-chip /EPROM Single-chip EPROM Single-chip EPROM Single-chip EPROM Single-chip EPROM Single-chip EPROM Single-chip EPROM Single-chip EPROM Input Input Input Output Input Input I/O I/O I/O Input Input Input Input Input I/O Input Input BUILT-IN PROM TYPE MICROCOMPUTERS PIN DESCRIPTION Pin Functions Mode Name Input/ output Apply voltage of 2.7 to 5.5 V to VCC and 0 V to VSS. Ground level input pin for A-D conver ter. Same voltage as VSS is applied. To enter the reset state, the reset input pin must be kept at a “L” for 2 µs or more (under normal VCC conditions). Connect to VSS. These are I/O pins of internal clock generating circuit for main clock. To control generating frequency, an external ceramic or a quartz crystal oscillator is con- nected between the XIN and XOUT pins. If an external clock is used, the clock source should be connected the XIN pin and the XOUT pin should be left open. Feedback resistor is connected between XIN and XOUT. Reference voltage input pin for the A-D converter. VREF works as CE input. Port P0 is an 8-bit I/O port. The output structure is CMOS output. When this port is selected for input, pull-up transistor can be connected in units of 1-bit and a key on wake up function is provided. Por t P0 works as an 8-bit data bus (D0 to D7). Port P1 is an 8-bit I/O port. The output structure is CMOS output. When this port is selected for input, pull-up transistor can be connected in units of 4-bit. P12 and P13 are in common with timer output pins T0, T1. P14, P15, P16 and P17 are in common with serial I/O pins RxD, TxD, SCLK, SRDY, respectively. P11 to P17 works as the 7-bit address input (A4 to A10). P10 must be opened. Port P2 is an 8-bit input port. This port is in common with analog input pins IN0 to IN7. P20 to P23 works as the lower 4-bit address input (A0 to A3). P24 to P27 must be opened. Port P3 is a 4-bit input port. P30 and P31 are in common with external interrupt in- put pins INT0, INT1 and P32, P33 are in common with timer input pins CNTR0, CNTR1. P30, P31 works as the 2-bit address input (A11, A12). P32 works as OE input. Connect to P33 to VPP when programming or verifying. Por t P4 is a 4-bit I/O port. The output structure is CMOS output. When this port is selected for input, pull-up transistor can be connected in units of 4-bit. P40 and P41 works as the higher 2-bit address input (A13, A14). P42 and P43 must be opened. Port P5 is a 4-bit input port and pull-up transistor can be connected in units of 4- bit. P50, P51 are in common with input/output pins of clock for clock function XCIN, XCOUT. When P50, P51 are used as XCIN, XCOUT, connect a ceramic or a quartz cr ystal oscillator between XCIN and XCOUT. If an external clock input is used, con- nect the clock input to the XCIN pin and open the XCOUT pin. Feedback resistor is connected between XCIN and XCOUT pins. Open. Notes 1 : AVSS for M37478M4/M8/E8-XXXFP and M37478M2/M4/E8TXXXFP. 2 : Only P20–P23 (IN0–IN3) 4-bit for the 7477 group. 3 : Only P40 and P41 2-bit for the 7477group. 4 : This port is not included in the 7477 group. |
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