7477 datasheet(20/48 Pages) RENESAS

20 / 48 page

MITSUBISHI MICROCOMPUTERS

7477/ 7478 GROUP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

buffers have the same address in memory. Since the shift register

cannot be written to or read from directly, transmit data is written

to the transmit buffer, and receive data is read from the receive

buffer. The transmit buffer can also hold the next data to be trans-

mitted, and the receive buffer can hold a character while the next

character is being received.

Asynchronous Serial I/O (UART) Mode

Clock asynchronous serial I/O mode (UART) can be selected by

clearing the serial I/O mode selection bit of the serial I/O control

Eight serial data transfer formats can be selected, and the transfer

formats used by a transmitter and receiver must be identical. The

transmit and receive shift registers each have a buffer, but the two

Fig. 10 UART serial I/O block diagram

Fig. 11 Operation of UART serial I/O function

Receive buffer register

Clock control circuit

Serial I/O control register

Baud rate generator

Serial I/O status register

1/4

Transmit shift completion flag (TSC)

Transmit interrupt request (TI)

Transmit buffer empty flag (TBE)

Receive buffer full flag (RBF)

Receive interrupt request (RI)

Frequency dividing ratio 1/(n+1)

P14

P15

P16

Receive shift register

Transmit shift register

Transmit buffer register

TXD

SCLK

RXD

f(XIN)

Address 00E016

Address 00E216

Address 00E016

Address 00E116

7-bit

1/16

UART control register

ST/SP/PA generation

Serial I/O synchronous clock

selection bit

SP detection

8-bit

ST detection

Address 00E316

Character

length

selection

bit

Data bus

TIC

Transmit or receive clock

Transmit buffer write signal

Serial output TxD

Receive buffer read signal

Serial input RxD

TBE=0

TSC=0

TBE=0

TBE=1

RBF=0

RBF=1

TSC=1

1 start bit

7 or 8 data bits

1 or 0 parity bit

1 or 2 stop bit(s)

VGenerated at 2nd bit in 2-stop-bit mode

Notes 1 : Error flag detection occurs at the same time that the RBF flag becomes “1” (at 1st stop bit during reception).

2 : The transmit interrupt (TI) can be selected to occur when either the TBE or TSC flag becomes “1,” depending on the

setting of the transmit interrupt source selection bit (TIC) of the serial I/O control register.

3 : The receive interrupt (RI) is set when the RBF flag becomes “1”.

TBE=1

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