SH7672 datasheet(198/1292 Pages) RENESAS

198 / 1292 page

Section 7

Bus State Controller (BSC)

Rev. 1.00 Nov. 14, 2007 Page 172 of 1262

REJ09B0437-0100

7.2

Input/Output Pins

Table 7.1 shows the pin configuration of the BSC.

Table 7.1

Pin Configuration

Name

I/O

Function

A25 to A0

Output Address bus

D31 to D0

I/O

Data bus

Output Bus cycle start

CS0, CS3, CS4

Output Chip select

CS5/CE1A,

CS6/CE1B

Output Chip select

Function as PCMCIA card select signals for D7 to D0 when PCMCIA

is used.

CE2A, CE2B

Output Function as PCMCIA card select signals for D15 to D8.

RD/

Output Read/write

Connects to

WE pins when SDRAM or SRAM with byte selection is

connected.

Output Read pulse signal (read data output enable signal)

Functions as a strobe signal for indicating memory read cycles when

PCMCIA is used.

WE3/DQMUU/

ICIOWR

Output Indicates that D31 to D24 are being written to.

Connected to the byte select signal when a SRAM with byte

selection is connected.

Functions as the select signals for D31 to D24 when SDRAM is

connected.

Functions as a strobe signal for indicating I/O write cycles when

PCMCIA is used.

WE2/DQMUL/

ICIORD

Output Indicates that D23 to D16 are being written to.

Connected to the byte select signal when a SRAM with byte

selection is connected.

Functions as the select signals for D23 to D16 when SDRAM is

connected.

Functions as a strobe signal for indicating I/O read cycles when

PCMCIA is used.

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