38K2 datasheet(331/358 Pages) RENESAS

331 / 358 page

3.4 List of registers

Rev.2.00

Oct 15, 2006

page 70 of 99

38K2 Group

REJ09B0338-0200

APPENDIX

IM_A

[10:8]

b7:b3

–

Index = 0316 : Memory address counter (MEMADH) [address 003516]

00000

Bit name

Bit symbol

At reset

Function

H/W

S/W

–: State remaining

–

Not used

channel operation start.

This contents are increased each time one memory

access ends.

Write “0” when writing.

“0” is read when reading.

Fig. 3.4.76 Index03[high]; Structure of Memory address counter

END_A

[10:8]

b7:b3

–

Index = 0416 : End address register (ENDADH) [address 003516]

00000

Bit name

Bit symbol

At reset

Function

H/W

S/W

–: State remaining

–

Not used

channel operation end.

Write “0” when writing.

“0” is read when reading.

Fig. 3.4.77 Index04[high]; Structure of End address register

Fig. 3.4.78 Structure of AD control register

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

Name

AD control register (ADCON) [Address : 3616 ]

AD control register

0 0 0 : P10/DQ0/AN0

0 0 1 : P11/DQ1/AN1

0 1 0 : P12/DQ2/AN2

0 1 1 : P13/DQ3/AN3

1 0 0 : P14/DQ4/AN4

1 0 1 : P15/DQ5/AN5

1 1 0 : P16/DQ6/AN6

1 1 1 : P17/DQ7/AN7

Analog input pin selection bits b2 b1 b0

AD conversion completion bit

0 : Conversion in progress

1 : Conversion completed

Nothing is arranged for these bits. These are write disabled bits.

When these bits are read out, the contents are indefinite.

38K2 Datasheet(PDF) 331 Page - Renesas Technology Corp

38K2 Datasheet(HTML) 331 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL