38K2 datasheet(330/358 Pages) RENESAS

330 / 358 page

3.4 List of registers

Rev.2.00

Oct 15, 2006

page 69 of 99

38K2 Group

REJ09B0338-0200

APPENDIX

HIGH_WIN

[7:0]

In-

definite

In-

definite

Bit name

Bit symbol

At reset

Function

H/W

S/W

–

The accessible register, using this register window,

depends on the EXB index register contents as

follows:

Index value

“0016”

: External I/O configuration register

“0116”

: Transmit/Receive buffer register

“0216”

: Memory channel operation mode register

“0316”

: Memory address counter

“0416”

: End address register

Fig. 3.4.74 Structure of Register window 2

Fig. 3.4.75 Index00[high]; Structure of External I/O configuration register

DRQ_CTR

[1:0]

DAK_CTR

[1:0]

TC_CTR

b7:b5

Index = 0016 : External I/O configuration register (EXBCFGH) [address 003516]

–

000

Bit name

Bit symbol

At reset

Function

H/W

S/W

b1b0

0 0 : Port

0 1 : Do not set.

1 0 : ExDREQ function; RxB_RDY (RxBuf ready) output

1 1 : ExDREQ function; Mch_req (Memory channel

request) output

Specifies P41/ExDACK/TxD pin function.

Selects which mode; requiring read or write signal, or

not requiring it for use of DMA acknowledge function.

b3b2

0 0 : Port

0 1 : Do not set.

1 0 : ExDACK function; DMA acknowledge input

(Mode for read and write signals used together)

1 1 :ExDACK function; DMA acknowledge input

(Mode for read and write signals not required)

0 : Port

1 : ExTC (terminal count) input

Write “0” when writing.

“0” is read when reading.

P40/ExDREQ/RxD pin control

bit

P41/ExDACK/TxD pin control

bit

P42/ExTC/SCLK pin control bit

Not used

–: State remaining

END_A

[7:0]

–

Index = 0416 : End address register (ENDADL) [address 003416]

Bit name

Bit symbol

At reset

Function

H/W

S/W

–: State remaining

–

channel operation end.

Fig. 3.4.73 Index04[low]; Structure of End address register

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