HD64F2621 datasheet(5/1069 Pages) RENESAS

5 / 1069 page

Rev. 5.00 Jan 10, 2006 page v of xxiv

Preface

The H8S/2626 Group and H8S/2623 Group are series of high-performance microcontrollers with a

32-bit H8S/2600 CPU core, and a set of on-chip supporting modules required for system

configuration.

The H8S/2600 CPU can execute basic instructions in one state, and is provided with sixteen 16-bit

general registers with a 32-bit internal configuration, and a concise and optimized instruction set.

The CPU can handle a 16 Mbyte linear address space (architecturally 4 Gbytes). Programs based

on the high-level language C can also be run efficiently.

The address space is divided into eight areas. The data bus width and access states can be selected

for each of these areas, and various kinds of memory can be connected fast and easily.

Single-power-supply flash memory (F-ZTAT™*), and mask ROM versions are available,

providing a quick and flexible response to conditions from ramp-up through full-scale volume

production, even for applications with frequently changing specifications.

On-chip supporting functions include a 16-bit timer pulse unit (TPU), programmable pulse

generator (PPG), watchdog timer (WDT), serial communication interface (SCI), controller area

network (HCAN), A/D converter, D/A converter (H8S/2626 Group only), and I/O ports.

In addition, data transfer controller (DTC) is provided, enabling high-speed data transfer without

CPU intervention.

Use of the H8S/2626 Group or H8S/2623 Group enables easy implementation of compact, high-

performance systems capable of processing large volumes of data.

This manual describes the hardware of the H8S/2626 Group and H8S/2623 Group. Refer to the

H8S/2600 Series and H8S/2000 Series Programming Manual for a detailed description of the

instruction set.

Note: *

F-ZTAT (Flexible-ZTAT) is a trademark of Renesas Technology Corp.

HD64F2621 Datasheet(PDF) 5 Page - Renesas Technology Corp