HD64F2621 datasheet(74/1069 Pages) RENESAS

74 / 1069 page

Section 2 CPU

Rev. 5.00 Jan 10, 2006 page 50 of 1042

REJ09B0275-0500

Type

Instruction

Size*

Function

TRAPA

—

Starts trap-instruction exception handling.

RTE

—

Returns from an exception-handling routine.

System

control

instructions

SLEEP

—

Causes a transition to a power-down state.

LDC

B/W

(EAs)

→ CCR, (EAs) → EXR

Moves the source operand contents or immediate data

to CCR or EXR. Although CCR and EXR are 8-bit

registers, word-size transfers are performed between

them and memory. The upper 8 bits are valid.

STC

B/W

CCR

→ (EAd), EXR → (EAd)

Transfers CCR or EXR contents to a general register or

memory. Although CCR and EXR are 8-bit registers,

word-size transfers are performed between them and

memory. The upper 8 bits are valid.

ANDC

CCR

∧ #IMM → CCR, EXR ∧ #IMM → EXR

Logically ANDs the CCR or EXR contents with

immediate data.

ORC

CCR

∨ #IMM → CCR, EXR ∨ #IMM → EXR

Logically ORs the CCR or EXR contents with immediate

data.

XORC

CCR

⊕ #IMM → CCR, EXR ⊕ #IMM → EXR

Logically exclusive-ORs the CCR or EXR contents with

immediate data.

NOP

—

PC + 2

→ PC

Only increments the program counter.

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