SH7014 datasheet(537/754 Pages) RENESAS

537 / 754 page

18. 128 kB Flash Memory (F-ZTAT)

Rev.5.00 Sep. 27, 2007 Page 503 of 716

REJ09B0398-0500

18.5.4

RAM Emulation Register (RAMER)

RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating

real-time flash memory programming. RAMER is initialized to H'0000 by a reset and in hardware

standby mode. It is not initialized in software standby mode. RAMER settings should be made in

user mode or user program mode.

Flash memory area divisions are shown in table 18.5. To ensure correct operation of the emulation

function, the ROM for which RAM emulation is performed should not be accessed immediately

after this register has been modified. Normal execution of an access immediately after register

modification is not guaranteed.

Bit:

⎯

Initial value:

R/W:

Bit:

⎯

RAMS

RAM1

RAM0

Initial value:

R/W:

R/W

Bits 15 to 3

⎯Reserved: These bits are always read as 0.

Bit 2

⎯RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in

RAM. When RAMS = 1, all flash memory block are program/erase-protected.

Bit 2

RAMS

Description

Emulation not selected

Program/erase-protection of all flash memory blocks is disabled

(Initial value)

Emulation selected

Program/erase-protection of all flash memory blocks is enabled

Bits 1 and 0

⎯Flash Memory Area Selection (RAM1, RAM0): These bits are used together

with bit 2 to select the flash memory area to be overlapped with RAM. (See table 18.5.)

SH7014 Datasheet(PDF) 537 Page - Renesas Technology Corp