7534 datasheet(34/221 Pages) RENESAS

34 / 221 page

7534 Group

HARDWARE

FUNCTIONAL DESCRIPTION

Rev.3.00

Oct 23, 2006

page 21 of 55

REJ09B0178-0300

Fig. 18 Interrupt control

Fig. 19 Structure of Interrupt-related registers

Interrupt disable flag I

Interrupt request

Interrupt request bit

Interrupt enable bit

BRK instruction

Reset

Interrupt edge selection register

INT0 interrupt edge selection bit

0 : Falling edge active

1 : Rising edge active

INT1 interrupt edge selection bit

0 : Falling edge active

1 : Rising edge active

Not used (returns “0” when read)

Serial I/O1 or INT1 interrupt selection bit

0 : Serial I/O1

1 : INT1

Timer X or key-on wake up interrupt selection bit

0 : Timer X

1 : Key-on wake up

Timer 2 or serial I/O2 interrupt selection bit

0 : Timer 2

1 : Serial I/O2

CNTR0 or AD converter interrupt selection bit

0 : CNTR0

1 : AD converter

(INTEDGE : address 003A16)

Interrupt request register 1

UART receive/USB IN token interrupt request bit

UART transmit/USB SETUP/OUT token/ Reset/Suspend/Resume/INT interrupt request bit

INT0 interrupt request bit

Timer X or key-on wake up interrupt request bit

Timer 1 interrupt request bit

Timer 2 or serial I/O2 interrupt request bit

CNTR0 or AD converter interrupt request bit

Not used (returns “0” when read)

0 : No interrupt request issued

1 : Interrupt request issued

(IREQ1 : address 003C16)

b0 Interrupt control register 1

UART receive/USB IN token interrupt enable bit

UART transmit/USB SETUP/OUT token/ Reset/Suspend/Resume/INT interrupt enable bit

INT0 interrupt enable bit

Timer X or key-on wake up interrupt enable bit

Timer 1 interrupt enable bit

Timer 2 or serial I/O2 interrupt enable bit

CNTR0 or AD converter interrupt enable bit

Not used (returns “0” when read)

(Do not write “1” to this bit)

0 : Interrupts disabled

1 : Interrupts enabled

(ICON1 : address 003E16)

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