7534 datasheet(97/221 Pages) RENESAS

97 / 221 page

APPLICATION

7534 Group

2.2 Timer

Rev.3.00

Oct 23, 2006

page 28 of 78

REJ09B0178-0300

Fig. 2.2.23 Control procedure

RESET

SEI

INTEDGE

PREX

IREQ1

ICON1

CLI

RTI

(address 3A16), bit5

, bit7

(address 2B16)

(address 2C16)

(address 2D16)

(address 3C16), bit3

, bit6

(address 3E16), bit3

, bit6

PREX

Inverted (A)

(A)

Low-order 8-bit result of

pulse width measurement

(A)

High-order 8-bit result of

pulse width measurement

PREX (address 2C16)

(address 2D16)

(address 2B16), bit3

256 – 1

000010112

Inverted (A)

256 – 1

•All interrupts disabled

•Timer X or key-on wake up interrupt selection : Timer X

•CNTR0 or AD converter interrupt source selection : CNTR 0

•Timer X operating mode : Pulse width measurement mode

(Measure “H” level of pulses input from CNTR 0 pin.)

•Set division ratio so that Timer X interrupt will occur at

174 ms intervals.

•Clear Timer X interrupt request bit

•Clear CNTR0 interrupt request bit

•Timer X interrupt enabled

•CNTR0 interrupt enabled

•Timer X count start

•Interrupts enabled

Note 1: When using Index X mode flag (T)

Note 2: When using Decimal mode flag (D)

•Push registers used in interrupt process routine

•Pop registers pushed to stack

Pop registers

Initialization

Timer X interrupt process routine

CLT (Note 1)

CLD (Note 2)

Push registers to stack

Process errors

•Error occurs

CNTR0 interrupt process routine

•Set division ratio so that Timer X interrupt will occur at

174 ms intervals.

•Read the count value and store it to RAM

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