7534 datasheet(83/221 Pages) RENESAS

83 / 221 page

APPLICATION

7534 Group

2.2 Timer

Rev.3.00

Oct 23, 2006

page 14 of 78

REJ09B0178-0300

Fig. 2.2.7 Structure of Timer count source set register

Fig. 2.2.8 Structure of Interrupt edge selection register

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

Name

Timer count source set register (TCSS) [Address : 2E 16]

Nothing is allocated for these bits. These are write disabled bits.

When these bits are read out, the values are “0”.

Timer count source set register

Timer X count source

selection bit (Note)

0 : f(XIN) / 16

1 : f(XIN) / 2

Note: To switch the timer X count source selection bit, stop the timer X count

operation before do that.

Interrupt edge selection register

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

Name

Interrupt edge selection register (INTEDGE) [Address : 3A 16]

Nothing is allocated for these bits. These are write disabled bits.

When these bits are read out, the values are “0”.

INT0 interrupt edge

selection bit (Note 1)

INT1 interrupt edge

selection bit ( Note 2)

0 : Falling edge active

1 : Rising edge active

0 : Falling edge active

1 : Rising edge active

Serial I/O1 or INT 1 interrupt

selection bit

Timer X or key-on wake up

interrupt selection bit

Timer 2 or serial I/O2 interrupt

selection bit

CNTR0 or AD converter

interrupt selection bit

0 : Serial I/O1

1 : INT1

0 : Timer X

1 : Key-on wake up

0 : Timer 2

1 : Serial I/O2

0 : CNTR0

1 : AD converter

Notes 1: 32-pin version: Not used.

This is a write disabled bit. When this bit is read out, the value is “0”.

2: 36-pin and 32-pin version: Not used.

This is a write disabled bit. When this bit is read out, the value is “0”.

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