7641 datasheet(241/385 Pages) RENESAS

241 / 385 page

Rev.2.00

Aug 28, 2006

page 110 of 148

7641 Group

REJ09B0336-0200

APPLICATION

2.8 Master CPU bus interface

Fig. 2.8.4 Structure of Data bus buffer control register 0

Data bus buffer control register 0

b7 b6 b5 b4 b3 b2 b1 b0

Data bus buffer control register 0

(DBBC0 : address 4A16)

Name

Functions

At reset R W

IBF0 output enable bit

Output buffer 0 empty

interrupt disable bit

0 : P52 functions as I/O port.

1 : P52 functions as OBF0 output pin.

0 : P53 functions as I/O port.

1 : P53 functions as IBF0

0 : Enabled

1 : Disabled

Master CPU bus interface

enable bit

Bus interface type select

bit

0 : RD,WR separate type bus

1 : R/W type bus

OBF0 output enable bit

Nothing arranged for this bit. Fix this bit to “0”.

0 : Occurrence due to data write (A0 = “0”) or

command write (A0 = “1”)

1 : Occurrence due to command write (A0 =

“1”)

IBF0 interrupt select bit

4 Input buffer 0 full interrupt

disable bit

0 : Enabled

1 : Disabled

Function of P54 to P57, P60 to P67 ;

0 : As I/O ports.

1 : As master CPU bus interface function

pins.

Data bus buffer control register 1

b7 b6 b5 b4 b3 b2 b1 b0

Data bus buffer control register 1

(DBBC0 : address 4E16)

Name

Functions

At reset R W

IBF1 output enable bit

Output buffer 1 empty

interrupt disable bit

0 : P74 functions as I/O port.

1 : P74 functions as OBF1 output pin.

(Note)

0 : P73 functions as I/O port.

1 : P73 functions as IBF1 output pin.

(Note)

0 : Enabled

1 : Disabled

Data bus buffer function

select bit

OBF1 output enable bit

Nothing arranged for these bits.

Fix these bits to “0”.

0 : Occurrence due to data write (A0 = “0”) or

command write (A0 = “1”)

1 : Occurrence due to command write (A0 =

“1”)

IBF1 interrupt select bit

Input buffer 1 full interrupt

disable bit

0 : Enabled

1 : Disabled

0 : Single data bus buffer mode(P72

functions as I/O port.)

1 : Double data bus buffer mode(P72

functions as S1 input pin.)

Note: This can be selected when the data bus buffer function select bit is “1”.

Fig. 2.8.5 Structure of Data bus buffer control register 1

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