HD6433635SW datasheet(65/418 Pages) RENESAS

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Example 2: Here a BSET instruction is executed designating port 6.

7 and P66 are designated as input pins, with a low-level signal input at P67 and a high-level

signal at P6

6. The remaining pins, P65 to P60, are output pins and output low-level signals. In this

example, the BSET instruction is used to change pin P6

0 to high-level output.

[A: Prior to executing BSET]

Input/output

Input

Output

Pin state

Low

level

High

level

Low

level

Low

level

Low

level

Low

level

Low

level

Low

level

PCR6

00111111

PDR6

10000000

[B: BSET instruction executed]

BSET

#0,

@PDR6

The BSET instruction is executed designating port 6.

[C: After executing BSET]

Input/output

Input

Output

Pin state

Low

level

High

level

Low

level

Low

level

Low

level

Low

level

Low

level

High

level

PCR6

00111111

PDR6

100000

[D: Explanation of how BSET operates]

When the BSET instruction is executed, first the CPU reads port 6.

Since P6

7 and P66 are input pins, the CPU reads the pin states (low-level and high-level input).

5 to P60 are output pins, so the CPU reads the value in PDR6. In this example PDR6 has a value

of H'80, but the value read by the CPU is H'40.

Next, the CPU sets bit 0 of the read data to 1, changing the PDR6 data to H'41. Finally, the CPU

writes this value (H'41) to PDR6, completing execution of BSET.

As a result of this operation, bit 0 in PDR6 becomes 1, and P6

0 outputs a high-level signal.

However, bits 7 and 6 of PDR6 end up with different values.

HD6433635SW Datasheet(PDF) 65 Page - Renesas Technology Corp

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