SH7713 datasheet(500/904 Pages) RENESAS

Part #	SH7713

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	904 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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500 / 904 page

Section 13 Direct Memory Access Controller (DMAC)

Rev.1.50 Aug. 30, 2006 Page 460 of 860

REJ09B0288-0150

Figure 13.1 shows a block diagram of the DMAC.

On-chip

peripheral module

DMA transfer request signal

DMA transfer acknowledge signal

External ROM

On-chip

memory

Interrupt controller

DREQ0, DREQ1

DEIn

DACK0, DACK1,

TEND0, TEND1

External RAM

Bus

interface

Bus state

controller

External I/O

(memory mapped)

External I/O

(with acknowledge-

ment)

Request

priority

control

Start-up

control

Iteration

control

SAR_n

DAR_n

DMATCR_n

CHCR_n

DMAOR

DMARS0-2

Legend

SAR_n

DAR_n

DMATCR_n

CHCR_n

DMAOR

DMARS0-2

DEIn

: DMA source address register

: DMA destination address register

: DMA transfer count register

: DMA channel control register

: DMA operation register

: DMA extension resource selector

: DMA transfer end interrupt request to the CPU

: 0, 1, 2, 3, 4, 5

DMAC module

Figure 13.1 Block Diagram of DMAC

SH7713 Datasheet(PDF) 500 Page - Renesas Technology Corp

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