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SH7713 Datasheet(PDF) 501 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 501 Page - Renesas Technology Corp |
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501 / 904 page ![]() Section 13 Direct Memory Access Controller (DMAC) Rev.1.50 Aug. 30, 2006 Page 461 of 860 REJ09B0288-0150 13.2 Input/Output Pins The external pins for the DMAC are described below. Table 13.1 lists the configuration of the pins that are connected to external bus. The DMAC has pins for 2 channels (channels 0 and 1) for external bus use. Table 13.1 Pin Configuration Channel Name Abbreviation I/O Function DMA transfer request DREQ0 I DMA transfer request input from external device to channel 0 DMA transfer request acknowledge DACK0 O DMA transfer request acknowledge output from channel 0 to external device 0 DMA transfer end TEND0 O DMA transfer end output for channel 0 DMA transfer request DREQ1 I DMA transfer request input from external device to channel 1 DMA transfer request acknowledge DACK1 O DMA transfer request acknowledge output from channel 1 to external device 1 DMA transfer end TEND1 O DMA transfer end output for channel 1 |
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