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SH7721 Datasheet(PDF) 491 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 491 Page - Renesas Technology Corp

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Section 10
Direct Memory Access Controller (DMAC)
Rev. 3.00 Jan. 18, 2008 Page 429 of 1458
REJ09B0033-0300
Table 10.6
Selecting On-Chip Peripheral Module Request Modes with RS3 to RS0 Bits
CHCR
DMARS
RS[3:0]
MID
RID
DMA Transfer
Request
Source
DMA Transfer
Request Signal
Source
Destination
Bus
Mode
01
SCIF0
transmitter
TXI0 (transmit FIFO data
empty interrupt)
Any
SCFTDR0
Cycle
steal
001000
10
SCIF0
receiver
RXI0 (receive FIFO data
full interrupt)
SCFRDR0
Any
Cycle
steal
01
SCIF1transmitt
er
TXI1 (transmit FIFO data
empty interrupt)
Any
SITDR
Cycle
steal
001010
10
SCIF1
receiver
RXI1 (receive FIFO data
full interrupt)
SCFRDR1
Any
Cycle
steal
000000
11
CMT
(channel 0)
Compare-match transfer
request
Any
Any
Cycle
steal/
burst
000001
11
CMT
(channel 1)
Compare-match transfer
request
Any
Any
Cycle
steal/
burst
000010
11
CMT
(channel 2)
Compare-match transfer
request
Any
Any
Cycle
steal/
burst
000011
11
CMT
(channel 3)
Compare-match transfer
request
Any
Any
Cycle
steal/
burst
1000
000100
11
CMT
(channel 4)
Compare-match transfer
request
Any
Any
Cycle
steal/
burst



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