SH7721 datasheet(499/1524 Pages) RENESAS

499 / 1524 page

Section 10

Direct Memory Access Controller (DMAC)

Rev. 3.00 Jan. 18, 2008 Page 437 of 1458

REJ09B0033-0300

(b)

Single Address Mode

In single address mode, either the transfer source or transfer destination peripheral device is

accessed (selected) by means of the DACK signal, and the other device is accessed by an address.

In this mode, the DMAC performs one DMA transfer in one bus cycle, accessing one of the

external devices by outputting the DACK transfer request acknowledge signal to it, and at the

same time outputting an address to the other device involved in the transfer. For example, in the

case of transfer between external memory and an external device with DACK shown in figure

10.7, when the external device outputs data to the data bus, that data is written to the external

memory in the same bus cycle.

DMAC

This LSI

DACK

DREQ

External address bus

External data bus

External

memory

External device

with DACK

Data flow

Figure 10.7

Data Flow in Single Address Mode

Two kinds of transfer are possible in single address mode: (1) transfer between an external device

with DACK and a memory-mapped external device, and (2) transfer between an external device

with DACK and external memory. In both cases, only the external request signal (DREQ) is used

for transfer requests.

SH7721 Datasheet(PDF) 499 Page - Renesas Technology Corp