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SH7721 Datasheet(PDF) 500 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 500 Page - Renesas Technology Corp |
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500 / 1524 page ![]() Section 10 Direct Memory Access Controller (DMAC) Rev. 3.00 Jan. 18, 2008 Page 438 of 1458 REJ09B0033-0300 Figure 10.8 shows an example of DMA transfer timing in single address mode. Address output to external memory space Select signal to external memory space Select signal to external memory space Data output from external device with DACK DACK signal (active-low) to external device with DACK Write strobe signal to external memory space Address output to external memory space Data output from external memory space DACK signal (active-low) to external device with DACK Read strobe signal to external memory space (a) External device with DACK → external memory space (ordinary memory) (b) External memory space (ordinary memory) → external device with DACK CKIO A25 to A0 D31 to D0 DACKn CSn WE CKIO A25 to A0 D31 to D0 DACKn CSn RD Figure 10.8 Example of DMA Transfer Timing in Single Address Mode |
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