SH7721 datasheet(590/1524 Pages) RENESAS

590 / 1524 page

Section 15

16-Bit Timer Pulse Unit (TPU)

Rev. 3.00 Jan. 18, 2008 Page 528 of 1458

REJ09B0033-0300

15.4

Operation

15.4.1

Overview

Operation in each mode is outlined below.

(1)

Normal Operation

Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of

free-running operation, synchronous counting, and external event counting.

(2)

Buffer Operation

When a compare match occurs, the value in the buffer register for the relevant channel is

transferred to TGR. For update timing from a buffer register, rewriting on compare match

occurrence or on counter clearing can be selected.

(3)

PWM Mode

In this mode, a PWM waveform is output. The output level can be set by means of TIOR. A PWM

waveform with a duty of between 0% and 100% can be output, according to the setting of each

TGR register.

(4)

Phase Counting Mode

In this mode, TCNT is incremented or decremented by detecting the phases of two clocks input

from the external clock input pins (TPU_TI2A and TPU_TI2B, or TPU_TI3A and TPU_TI3B) in

channels 2, and 3. When phase counting mode is set, the corresponding TI pin functions as the

clock pin, and TCNT performs up/down-counting.

This can be used for two-phase encoder pulse input.

SH7721 Datasheet(PDF) 590 Page - Renesas Technology Corp