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SH7721 Datasheet(PDF) 589 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 589 Page - Renesas Technology Corp |
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589 / 1524 page ![]() Section 15 16-Bit Timer Pulse Unit (TPU) Rev. 3.00 Jan. 18, 2008 Page 527 of 1458 REJ09B0033-0300 15.3.8 Timer Start Register (TSTR) TSTR is a 16-bit readable/writable register that selects TCNT operation/stoppage for channels 0 to 3. TSTR is initialized to H'0000 by a reset, but not initialized in standby mode, sleep mode, or module standby. Bit Bit Name Initial Value R/W Description 15 to 4 All 0 R Reserved These bits are always read as 0 and cannot be modified. 3 2 1 0 CST3 CST2 CST1 CST0 0 0 0 0 R/W R/W R/W R/W Counter Start 3 to 0 These bits select operation or stoppage for TCNT. 0: TCNTn count operation is stopped) 1: TCNTn performs count operation n=3 to 0 |
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