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SH7721 Datasheet(PDF) 669 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 669 Page - Renesas Technology Corp |
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669 / 1524 page ![]() Section 18 Serial Communication Interface with FIFO (SCIF) Rev. 3.00 Jan. 18, 2008 Page 607 of 1458 REJ09B0033-0300 18.3.9 Bit Rate Register (SCBRR) SCBRR is an eight-bit readable/writable register that, together with the baud rate generator clock source selected by the CKS1 and CKS0 bits in the serial mode register (SCSMR), determines the serial transmit/receive bit rate. Bit Bit Name Initial value R/W Description 7 to 0 SCBRD7 to SCBRD0 H'FF R/W Bit Rate Set The SCBRR setting is calculated as follows: Asynchronous Mode: 1. When sampling rate is 1/16 N = P φ 32 × 22n-1 × B × 106 - 1 2. When sampling rate is 1/5 N = P φ 10 × 22n-1 × B × 106 - 1 3. When sampling rate is 1/11 N = P φ 22 × 22n-1 × B × 106 - 1 4. When sampling rate is 1/13 N = P φ 26 × 22n-1 × B × 106 - 1 5. When sampling rate is 1/27 N = P φ 54 × 22n-1 × B × 106 - 1 Synchronous Mode: N = P φ 4 × 22n-1 × B × 106 - 1 |
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