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SH7721 Datasheet(PDF) 689 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 689 Page - Renesas Technology Corp |
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689 / 1524 page  Section 18 Serial Communication Interface with FIFO (SCIF) Rev. 3.00 Jan. 18, 2008 Page 627 of 1458 REJ09B0033-0300 No Yes Wait 1. Be sure to set the RFRST bit in SCFCR to 1, to reset the FIFOs. 2. Set the clock selection in SCSCR. Be sure to clear bits RIE, TIE, TE, and RE to 0. 3. Set the clock source selection in SCSMR. 4. Write a value corresponding to the bit rate into SCBRR. 5. Clear the RFRST bit in SCFCR to 0. 6. Wait one bit interval. Initialization Clear TE and RE bits in SCSCR to 0 Set RFRST bit in SCFCR to 1 Set CKE1 and CKE0 bits in SCSCR (leaving TE and RE bits cleared to 0) Set C/A bit in SCSMR to 1 Set CKS1 and CKS0 bits Set value in SCBRR Clear RFRST bit to 0 1-bit interval elapsed? End 1 2 3 4 5 6 Figure 18.13 Sample SCIF Initialization Flowchart (2) (Reception) |
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