SH7721 datasheet(690/1524 Pages) RENESAS

690 / 1524 page

Section 18

Serial Communication Interface with FIFO (SCIF)

Rev. 3.00 Jan. 18, 2008 Page 628 of 1458

REJ09B0033-0300

Yes

Wait

1. Be sure to set the TFRST bit in

SCFCR to 1, to reset the FIFOs.

2. Set the clock selection in SCSCR.

Be sure to clear bits RIE, TIE, TE,

and RE to 0.

3. Set the clock source selection in

SCSMR.

4. Write a value corresponding to the

bit rate into SCBRR.

5. Clear the TFRST and RFRST bits in

SCFCR to 0.

6. Set the transmit trigger number, write

transmit data exceeding the transmit

trigger setting number, and clear the

TDFE flag to 0 after reading it.

7. Wait one bit interval.

Initialization

Clear TE and RE bits in SCSCR to 0

Set TFRST and RFRST bits in

SCFCR to 1

Set CKE1 and CKE0 bits in SCSCR

(leaving TE and RE bits cleared to 0)

Set C/A bit in SCSMR to 1

Set CKS1 and CKS0 bits

Set value in SCBRR

Clear TFRST and RFRST bits to 0

Set transmit trigger number in TTRG1

and TTRG0 in SCFCR, write transmit

data exceeding transmit trigger

setting number, and clear TDFE

flag to 0 after reading 1 from it

1-bit interval elapsed?

End

Figure 18.13

Sample SCIF Initialization Flowchart (3)

(Simultaneous Transmission and Reception)

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