SH7721 datasheet(733/1524 Pages) RENESAS

733 / 1524 page

Section 20

2C Bus Interface (IIC)

Rev. 3.00 Jan. 18, 2008 Page 671 of 1458

REJ09B0033-0300

BBSY=0 ?

TEND=1 ?

Yes

Start

[1]

[2]

[3]

[4]

[5]

[6]

[7]

[8]

[9]

[10]

[11]

[13]

[14]

[15]

Initialize

Set MST and TRS

in ICCR1 to 1.

Write 1 to BBSY

and 0 to SCP.

Write transmit data

in ICDRT

Write 0 to BBSY

and SCP

Set MST and

TRS to 0 in ICCR1

Read BBSY in ICCR2

Read TEND in ICSR

Read ACKBR in ICIER

Mater receive mode

Yes

ACKBR=0 ?

Write transmit data in ICDRT

Read TDRE in ICSR

Read TEND in ICSR

Clear TEND in ICSR

Read STOP in ICSR

Clear TDRE in ICSR

End

Write transmit data in ICDRT

Transmit

mode?

Yes

TDRE=1 ?

Last byte?

STOP=1 ?

Yes

TEND=1 ?

Yes

[1]

Test the status of the SCL and SDA lines.

[2]

Set master transmit mode.

[3]

Issue the start candition.

[4]

Set the first byte (slave address + R/

W) of transmit data.

[5]

Wait for 1 byte to be transmitted.

[6]

Test the acknowledge transferred from the specified slave device.

[7]

Set the second and subsequent bytes (except for the final byte) of transmit data.

[8]

Wait for ICDRT empty.

[9]

Set the last byte of transmit data.

[10] Wait for last byte to be transmitted.

[11] Clear the TEND flag.

[12] Clear the STOP flag.

[13] Issue the stop condition.

[14] Wait for the creation of stop condition.

[15] Set slave receive mode. Clear TDRE.

[12]

Clear STOP in ICSR

Figure 20.14

Sample Flowchart for Master Transmit Mode

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