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SH7721 Datasheet(PDF) 735 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 735 Page - Renesas Technology Corp

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Section 20
I
2C Bus Interface (IIC)
Rev. 3.00 Jan. 18, 2008 Page 673 of 1458
REJ09B0033-0300
TDRE=1 ?
Yes
Yes
No
Slave transmit mode
Clear AAS in ICSR
Write transmit data
in ICDRT
Read TDRE in ICSR
Last
byte?
Write transmit data
in ICDRT
Read TEND in ICSR
Clear TEND in ICSR
Clear TRS in ICCR1 to 0
Dummy read ICDRR
Clear TDRE in ICSR
End
[1] Clear the AAS flag.
[2] Set transmit data for ICDRT (except for the last data).
[3] Wait for ICDRT empty.
[4] Set the last byte of transmit data.
[5] Wait for the last byte to be transmitted.
[6] Clear the TEND flag .
[7] Set slave receive mode.
[8] Dummy-read ICDRR to release the SCL line.
[9] Clear the TDRE flag.
No
No
Yes
TEND=1 ?
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
Figure 20.16
Sample Flowchart for Slave Transmit Mode



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