SH7721 datasheet(746/1524 Pages) RENESAS

746 / 1524 page

Section 21

Serial I/O with FIFO (SIOF)

Rev. 3.00 Jan. 18, 2008 Page 684 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial

Value

R/W

Description

FL3

FL2

FL1

FL0

R/W

Frame Length 3 to 0

00xx: Data length is 8 bits and frame length is 8 bits.

0100: Data length is 8 bits and frame length is 16 bits.

0101: Data length is 8 bits and frame length is 32 bits.

0110: Data length is 8 bits and frame length is 64 bits.

0111: Data length is 8 bits and frame length is 128 bits.

10xx: Data length is 16 bits and frame length is 16 bits.

1100: Data length is 16 bits and frame length is 32 bits.

1101: Data length is 16 bits and frame length is 64 bits.

1110: Data length is 16 bits and frame length is 128 bits.

1111: Data length is 16 bits and frame length is 256 bits.

Note: When data length is specified as 8 bits, control

data cannot be transmitted or received.

x: Don't care

TXDIZ

R/W

SIOFTxD Pin Output when Transmission is Invalid*

0: High output (1 output) when invalid

1: High-impedance state when invalid

Note: Invalid means when disabled, and when a slot that

is not assigned as transmit data or control data is

being transmitted.

RCIM

R/W

Receive Control Data Interrupt Mode

0: Sets the RCRDY bit in SISTR when the contents of

SIRCR change.

1: Sets the RCRDY bit in SISTR each time when the

SIRCR receives the control data.

SYNCAC

R/W

SIOFSYNC Pin Polarity

Valid when the SIOFSYNC signal is output as

synchronous pulse in master mode.

0: Active-high

1: Active-low

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