SH7721 datasheet(752/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 21

Serial I/O with FIFO (SIOF)

Rev. 3.00 Jan. 18, 2008 Page 690 of 1458

REJ09B0033-0300

21.3.4

Receive Data Register (SIRDR)

SIRDR is a 32-bit read-only register that reads receive data of the SIOF. SIRDR stores data in the

receive FIFO and is initialized by the conditions specified in section 37, List of Registers, or by a

receive reset caused by the RXRST bit in SICTR.

Bit

Bit Name

Initial

Value

R/W

Description

31 to 16

SIRDL

15 to 0

All 0

Left-Channel Receive Data

Store data received from the SIOFRxD pin as left-

channel data. The position of the left-channel data in

the receive frame is specified by the RDLA bit in

SIRDAR.

• These bits are valid only when the RDLE bit in

SIRDAR is set to 1.

15 to 0

SIRDR

15 to 0

All 0

Right-Channel Receive Data

Store data received from the SIOFRxD pin as right-

channel data. The position of the right-channel data in

the receive frame is specified by the RDRA bit in

SIRDAR.

• These bits are valid only when the RDRE bit in

SIRDAR is set to 1.

SH7721 Datasheet(PDF) 752 Page - Renesas Technology Corp