SH7721 datasheet(808/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 22

Analog Front End Interface (AFEIF)

Rev. 3.00 Jan. 18, 2008 Page 746 of 1458

REJ09B0033-0300

22.3.6

Ringing Pulse Counter (RCNT)

The result of counting 1 cycle of ringing waveform with AFE_FS is shown here.

Bit

Bit Name

Initial Value

R/W

Description

15 to 0

RCNT15 to

RCNT0

All 0

R/W

Ringing Counter Value

The result of counting 1 cycle of input ringing

waveform with AFE_FS (output of AFE). See

section 22.4.3, DAA Interface for more detail

about the ringing detect sequence.

22.3.7

AFE Control Data Register (ACDR)

ACDR is the register to store the AFE control word. After 1 is written to HC bit (ACTR1), data is

transferred to AFE at the timing of 3rd FS.

Bit

Bit Name

Initial Value

R/W

Description

15 to 0

ACDR15 to

ACDR0

All 0

R/W

Store the AFE control word.

22.3.8

AFE Status Data Register (ASDR)

ASDR is the register to store the AFE status word. After 1 is written to HC bit (ACTR2), data is

transferred to ASDR from AFE at the timing of 3rd FS.

Bit

Bit Name

Initial Value

R/W

Description

15 to 0

ASDR15 to

ASDR0

All 0

Store the AFE control word.

SH7721 Datasheet(PDF) 808 Page - Renesas Technology Corp

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