SH7721 datasheet(951/1524 Pages) RENESAS

951 / 1524 page

Section 26

LCD Controller (LCDC)

Rev. 3.00 Jan. 18, 2008 Page 889 of 1458

REJ09B0033-0300

26.3.17

LCDC Power Management Mode Register (LDPMMR)

LDPMMR controls the power supply circuit that provides power to the LCD module. The usage

of two types of power-supply control pins, LCD_VCPWC and LCD_VEPWC, and turning on or

off the power supply function are selected.

Bit

Bit Name

Initial Value

R/W

Description

ONC3

ONC2

ONC1

ONC0

R/W

LCDC Power-On Sequence Period

Set the period from LCD_VEPWC assertion to

LCD_DON assertion in the power-on sequence of

the LCD module in frame units.

Specify to the value of (the period) -1.

This period is the (c) period in figures 26.4 to 26.7,

Power-Supply Control Sequence and States of the

LCD Module. For details on setting this register,

see table 26.5, Available Power-Supply Control-

Sequence Periods at Typical Frame Rates. (The

setting method is common for ONA, ONB, OFFD,

OFFE, and OFFF.)

OFFD3

OFFD2

OFFD1

OFFD0

R/W

LCDC Power-Off Sequence Period

Set the period from LCD_DON negation to

LCD_VEPWC negation in the power-off sequence

of the LCD module in frame units.

Specify to the value of (the period) -1.

This period is the (d) period in figures 26.4 to 26.7,

Power-Supply Control Sequence and States of the

LCD Module.



Reserved

This bit is always read as 0. The write value should

always be 0.

VCPE

R/W

LCD_VCPWC Pin Enable

Sets whether or not to enable a power-supply

control sequence using the LCD_VCPWC pin.

0: Disabled: LCD_VCPWC pin is masked and fixed

low

1: Enabled: LCD_VCPWC pin output is asserted

and negated according to the power-on or

power-off sequence

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