SH7721 datasheet(953/1524 Pages) RENESAS

953 / 1524 page

Section 26

LCD Controller (LCDC)

Rev. 3.00 Jan. 18, 2008 Page 891 of 1458

REJ09B0033-0300

26.3.18

LCDC Power-Supply Sequence Period Register (LDPSPR)

LDPSPR controls the power supply circuit that provides power to the LCD module. The timing to

start outputting the timing signals to the LCD_VEPWC and LCD_VCPWC pins is specified.

Bit

Bit Name

Initial Value

R/W

Description

ONA3

ONA2

ONA1

ONA0

R/W

LCDC Power-On Sequence Period

Set the period from LCD_VCPWC assertion to

starting output of the display data (LCD_DATA) and

timing signals (LCD_FLM, LCD_CL1, LCD_CL2,

and LCD_M_DISP) in the power-on sequence of

the LCD module in frame units.

Specify to the value of (the period)-1.

This period is the (a) period in figures 26.4 to 26.7,

Power-Supply Control Sequence and States of the

LCD Module.

ONB3

ONB2

ONB1

ONB0

R/W

LCDC Power-On Sequence Period

Set the period from starting output of the display

data (LCD_DATA) and timing signals (LCD_FLM,

LCD_CL1, LCD_CL2, and LCD_M_DISP) to the

LCD_VEPWC assertion in the power-on sequence

of the LCD module in frame units.

Specify to the value of (the period)-1.

This period is the (b) period in figures 26.4 to 26.7,

Power-Supply Control Sequence and States of the

LCD Module.

OFFE3

OFFE2

OFFE1

OFFE0

R/W

LCDC Power-Off Sequence Period

Set the period from LCD_VEPWC negation to

stopping output of the display data (LCD_DATA)

and timing signals (LCD_FLM, LCD_CL1,

LCD_CL2, and LCD_M_DISP) in the power-off

sequence of the LCD module in frame units.

Specify to the value of (the period)-1.

This period is the (e) period in figures 26.4 to 26.7,

Power-Supply Control Sequence and States of the

LCD Module.

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