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SH7721 Datasheet(PDF) 1069 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 1069 Page - Renesas Technology Corp |
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1069 / 1524 page ![]() Section 30 SIM Card Module (SIM) Rev. 3.00 Jan. 18, 2008 Page 1007 of 1458 REJ09B0033-0300 30.4.2 Data Format Figure 30.2 shows the data format used by the smart card interface. The smart card interface performs a parity check for each frame during reception. During reception in T = 0 mode, if a parity error is detected, an error signal is returned to the transmit side, requesting data retransmission. When the transmit side samples the error signal, it retransmits the same data. During reception in T = 1 mode, if a parity error is detected, an error signal is not returned. During transmission, error signals are not sampled and data is not retransmitted. Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp Ds D1 D2 D3 D4 D5 D6 D7 Dp Ds D0 DE Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp Ds When no parity error occurs When a parity error occurs in T=0 mode When a parity error occurs in T=1 mode Transmitter output Transmitter output Transmitter output Receiver output Ds: Start bit, D0 to D7: Data bits, Dp: Parity bit, DE: Error signal Figure 30.2 Data Format Used by Smart Card Interface The operation sequence is as follows. 1. When not in use, the data line is in a high-impedance state and fixed at high level by a pull-up resistance. 2. The transmit side initiates transmission of one frame of data. The data frame begins with the start bit (Ds: low level). This is followed by eight data bits (D0 to D7) and the parity bit (Dp). |
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