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SH7721 Datasheet(PDF) 1075 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 1075 Page - Renesas Technology Corp

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Section 30
SIM Card Module (SIM)
Rev. 3.00 Jan. 18, 2008 Page 1013 of 1458
REJ09B0033-0300
Yes
No
Wait
Initialization
Clear the TE and RE bits in SCSCR to 0
Clear the ERS, PER, ORER, and
WAIT_ER flags in SCSSR to 0
Set the parity using the O/
E bit in SCSMR
Set the LCB, PB, SMIF, SDIR, and
SINV bits in SCSCMR
Set SCBRR
Set the clock using the CKE1 and CKE0
bits in SCSCR. Clear the TIE, RIE,
TE, RE, TEIE, and WAIT_IE flags to 0.
Has a 1-bit
interval elapsed?
Set the TIE, RIE, TE, and RE bits in SCSCR
End
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Figure 30.4
Example of Initialization Flow



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