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SH7721 Datasheet(PDF) 1101 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 1101 Page - Renesas Technology Corp |
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1101 / 1524 page ![]() Section 31 MultiMediaCard Interface (MMCIF) Rev. 3.00 Jan. 18, 2008 Page 1039 of 1458 REJ09B0033-0300 Table 31.4 Correspondence between Command Response Byte Number and RSPR MMC Mode Response RSPR Registers 6 Bytes (R1, R1b, R3, R4, R5) 17 Bytes (R2) RSPR0 1st byte RSPR1 2nd byte RSPR2 3rd byte RSPR3 4th byte RSPR4 5th byte RSPR5 6th byte RSPR6 7th byte RSPR7 8th byte RSPR8 9th byte RSPR9 10th byte RSPR10 11th byte RSPR11 1st byte 12th byte RSPR12 2nd byte 13th byte RSPR13 3rd byte 14th byte RSPR14 4th byte 15th byte RSPR15 5th byte 16th byte RSPR16 6th byte 17th byte RSPR0 to RSPR16 are simple shift registers. A command response that has been shifted in is not automatically cleared, and it is continuously shifted until it is shifted out from the bit 7 in RSPR0. To clear unnecessary bytes to H'00, write arbitrary values to each RSPR. • RSPR0 to RSPR16 Bit Bit Name Initial Value R/W Description 7 to 0 RSPR All 0 R/W These bits are cleared to H'00 by writing an arbitrary value. RSPR0 to RSPR16 are continuous 17-byte shift registers. Command response is stored. |
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