SH7721 datasheet(1110/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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1110 / 1524 page

Section 31

MultiMediaCard Interface (MMCIF)

Rev. 3.00 Jan. 18, 2008 Page 1048 of 1458

REJ09B0033-0300

• INTCR1

Bit

Bit Name

Initial

Value

R/W

Description

INTRQ2E 0

R/W

int_err_n Interrupt Enable

0: Disables int_err_n interrupt

1: Enables int_err_n interrupt

INTRQ1E 0

R/W

int_tran_n Interrupt Enable

0: Disables int_tran_n interrupt

1: Enables int_tran_n interrupt

INTRQ0E 0

R/W

int_fstat_n Interrupt Enable

0: Disables int_fstat_n interrupt

1: Enables int_fstat_n interrupt



Reserved

This bit is always read as 0. The write value should always

be 0.

WRERIE

R/W

Write Error Flag Enable

0: Disables write error flag setting

1: Enables write error flag setting

CRCERIE 0

R/W

CRC Error Flag Enable

0: Disables CRC error flag setting

1: Enables CRC error flag setting

DTERIE

R/W

Data Timeout Error Flag Enable

0: Disables data timeout error flag setting

1: Enables data timeout error flag setting

CTERIE

R/W

Command Timeout Error Flag Enable

0: Disables command timeout error flag setting

1: Enables command timeout error flag setting

SH7721 Datasheet(PDF) 1110 Page - Renesas Technology Corp

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