SH7721 datasheet(1111/1524 Pages) RENESAS

1111 / 1524 page

Section 31

MultiMediaCard Interface (MMCIF)

Rev. 3.00 Jan. 18, 2008 Page 1049 of 1458

REJ09B0033-0300

31.3.14

Interrupt Status Registers 0 and 1 (INTSTR0 and INTSTR1)

INTSTR enable or disable MMCIF interrupts.

• INTSTR0

Bit

Bit Name

Initial

Value

R/W

Description

FEI

R/(W)* FIFO Empty Flag

[Setting condition]

When FIFO becomes empty while FEIE = 1 and write data

is transmitted. (When the FIFO_EMPTY bit in CSTR is set.)

[Clearing condition]

Write 0 after reading FEI = 1.

FFI

R/(W)* FIFO Full Flag

[Setting condition]

When FIFO becomes full while FFIE = 1 and read data is

received. (When the FIFO_FULL bit in CSTR is set.)

[Clearing condition]

Write 0 after reading FFI = 1.

DRPI

R/(W)* Data Response Flag

[Setting condition]

When the CRC status is received while DRPIE = 1.

[Clearing condition]

Write 0 after reading DRPI = 1.

DTI

R/(W)* Data Transfer End Flag

[Setting condition]

When the number of bytes of data transfer specified in

TBCR ends while DTIE = 1.

[Clearing condition]

Write 0 after reading DTI = 1.

CRPI

R/(W)* Command Response Reception End Flag

[Setting condition]

When command response reception ends while CRPIE = 1.

[Clearing condition]

Write 0 after reading CRPI = 1.

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