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7721 Datasheet(PDF) 34 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 34 Page - Renesas Technology Corp |
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34 / 577 page  CENTRAL PROCESSING UNIT (CPU) 7721 Group User’s Manual 2–11 2.2 Bus interface unit 2.2.2 Functions of bus interface unit (BIU) The bus interface unit (BIU) consists of four registers shown in Figure 2.2.2. Table 2.2.1 lists the functions of each register. Program address register Instruction queue buffer Data address register Data buffer PA DA Q0 Q1 Q2 DBH DBL b23 b0 b0 b0 b0 b23 b15 b7 Table 2.2.1 Functions of each register Functions Indicates the storage address for the instruction which is next taken into the instruction queue buffer. Temporarily stores the instruction which has been taken in. Indicates the address for the data which is next read from or written to. Temporarily stores the data which is read from the memory•I/O device by the BIU or which is written to the memory•I/O device by the CPU. Name Program address register Instruction queue buffer Data address register Data buffer Fig. 2.2.2 Register structure of bus interface unit (BIU) |
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