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38C3 Datasheet(PDF) 183 Page - Renesas Technology Corp |
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38C3 Datasheet(HTML) 183 Page - Renesas Technology Corp |
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183 / 224 page ![]() 3-38 APPENDIX 38C3 Group User’s Manual 3.5 Control registers 3.5 Control registers Fig. 3.5.1 Structure of Port Pi Fig. 3.5.2 Structure of Port P0 direction register and Port P1 direction register Port Pi b7 b6 b5 b4 b3 b2 b1 b0 Port Pi (i = 0, 1, 2, 3, 4, 5, 6, 8) (Pi: addresses 0016, 0216, 0416, 0616, 0816, 0A16, 0C16, 1016) b 0 0 Port Pi0 qIn output mode Write •••••••• Port latch Read •••••••• Port latch qIn input mode Write •••••••• Port latch Read •••••••• Value of pin Port Pi1 Port Pi2 Port Pi3 Port Pi4 Port Pi5 Port Pi6 Port Pi7 Functions Name At reset R W 1 0 2 0 3 0 4 0 5 0 6 0 7 0 Port P0 direction register, Port P1 direction register b7 b6 b5 b4 b3 b2 b1 b0 Port P0 direction register (P0D: address 0116) Port P1 direction register (P1D: address 0316) b 0 Name 0 Functions At reset R W 0 0 0 0 0 Ports P0/P1 direction register 0 0 !! !! 0 !! !! !! !! ! ! ! Nothing is arranged for these bits. When these bits are read out, the contents are undefined. 2 3 4 5 6 7 1 0 : All bits of ports P0/P1 input mode 1 : All bits of ports P0/P1 output mode Note: Ports P0 and P1 are switched to input and output by each port. When b0 of corresponding port direction register is set to “0”, all 8 bits of port become input port. When b0 of corresponding port direction register is set to “1”, all 8 bits of port become output port. Nothing is arranged for b1 to b7 of port P0 and port P1 direction registers. These are write disabled bits. |
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